This invention relates to the cancellation of fixed pattern noise in active pixel sensors arrays and, in particular, to a method and apparatus for cancelling voltage offset noise in active pixel image sensor arrays.
Active pixel sensor (APS) arrays are solid state image sensing structures, typically manufactured using CMOS technology. They are distinguished by integrating some form of active electronic circuitry within each pixel to produce a buffered or amplified representation of the small signal charge induced by photoelectric conversion in the pixel. Typically the pixel output takes the form of a low-impedance voltage signal.
Whilst the low impedance pixel output is useful in the pixel reading operation, each buffer or amplifier commonly exhibits a fixed voltage offset which varies randomly with pixel location. If these offsets are left uncorrected, the resulting images produced from the pixel outputs are marred by a fixed speckled pattern.
This has been recognised by others working in this field, and techniques have been developed to cancel these offsets.
One example of such a technique is described in U.S. Pat. No.4,942,474 (Akimoto et al.), who teach the use of two capacitors in each column of pixels in the pixel array. A row of pixels is first read into one row of capacitors, which then each hold one sample of a pixel output with combined signal and offset. The same row of pixels is then reset and the pixel outputs during reset are stored in the second row of capacitors. As the reset output from the pixels also contains the same offset, then the difference between the values stored on the two capacitors in each column represents solely the signal value that is to be detected. This differencing may occur in many ways all of which involve reading or "scanning out" from the pixel array the stored values from the pair of capacitors in each column and differencing each pair of scanned out values.